1. Field of Invention
This disclosure generally relates to techniques for reducing thermal stress on chips. More specifically, this disclosure relates to techniques for reducing thermal stress on large Integrated Circuit (IC) chips and large discrete chips by using stress relief structures while incorporating heat removal capability.
2. Description of the Related Art
In order to realize the full potential of silicon power devices, it is essential that contacts to the devices possess the lowest possible electrical and thermal resistances. The requirement presents a serious problem since all low-resistivity materials exhibit high thermal expansion relative to silicon. If any of these materials are bonded to silicon at an elevated temperature and subsequently cooled, the silicon will be left under compressional stress. For the high-conductivity metals, copper and aluminum, the stresses may be substantial. As the complexity and switching speed of semiconductor chips continue to increase, the thermal expansion problem become even more important. Therefore, what is needed is a mechanism to effectively remove the heat and relieve the thermal stress of a large Integrated Circuit (IC) chip or discrete chip to improve reliability.